Improvement of Electrical Characteristics in LDMOS by the Insertion of PBL and Gate Extended Field Plate Technologies

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題名:	Improvement of Electrical Characteristics in LDMOS by the Insertion of PBL and Gate Extended Field Plate Technologies
作者:	許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming
貢獻者:	光電與通訊學系
關鍵詞:	"impact ionization, breakdown voltage, on-resistance, LDMOS, field plate, TCAD simulation. "
日期:	2011-08
上傳時間:	2012-11-26 02:22:12 (UTC+0)
摘要:	"This article provides a fabricating method to improve significantly both of the breakdown voltage and specific on-resistance in high resistivity drift region LDMOS using by both of the PBL doping under the source terminal and the gate extended field plate technologies. The insertion of PBL aims at the reduction of bulk current caused by the impact-ionization-generated holes while the gate extended field plate were be used to shift the impact ionization region from N-drift region surface near the gate side down toward the junction between the P-body and N-drift region to increase the breakdown voltage due to the increase of maximum depletion in the N-drift region. "
關聯:	The Ninth International Conference on Electronic Measurement & Instruments
顯示於類別:	[光電與通訊學系] 期刊論文

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