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    ASIA unversity > 資訊學院 > 資訊工程學系 > 博碩士論文 >  Item 310904400/95803


    Please use this identifier to cite or link to this item: http://asiair.asia.edu.tw/ir/handle/310904400/95803


    Title: Study on ESD protection device of GGNMOS and Built Macro Model
    Authors: Wang, Jun-Bo
    Contributors: 資訊工程學系
    Keywords: ESD;GGNMOS;Macro Model
    Date: 2015
    Issue Date: 2015-11-20
    Publisher: 亞洲大學
    Abstract: With the rapid progress of electronic products, ESD (Electro-Static Discharge, ESD) is one of the major problems for the manufacture of integrated circuit design, and in the manufacture of integrated circuits, in manufacturing, packaging and shipping, are likely to produce static electricity to make an integrated circuit be destroyed one of the factors, component size reduction is more sensitive to electrostatic discharge and are more vulnerable to damage and the electrostatic discharge protection has become a major issue, ESD protection can make changes from circuit design, you can start from the device to adjust, the electrostatic discharge protection device mainly diodes (Diode), metal oxide semiconductor transistor (MOSFET), silicon controlled rectifier (SCR).
    In this paper, the research electrostatic discharge protection device is extremely grounded N- type metal oxide semiconductor transistor (Gate ground NMOS, referred GGNMOS), by using TCAD simulation software to simulate the basic IV characteristics and electrostatic discharge characteristics, simulate by the physical module to calibrate for more accurate results, the establishment of the Macro Model. In Chapter III of the 5V GGNMOS element contact hole drain to the gate electrode spacing (Drain contact to gate spacing, DCGS) effect, by varying the spacing make a impact on the ESD characteristics of analog measurement, and the channel length effect for Holding Voltage make a simulation analysis, followed by HSPICE software, analog and establish Macro Model, BJT parameters adjusted to match silicon results. In the fourth chapter 40V GGNMOS secondary Trigger Voltage, Holding Voltage do a simulation.
    All in all, by TCAD simulation to establish Macro Model, via element simulation, ESD simulation, from the simulated 2D cross-sectional structure to observe its current flow, distribution, come to confirm the presence of other parasitic effects on whether the element, again do it via an analog measurement Macro Model, see if there is this effect, and can be adjusted Macro Model internal parameters to predict change and Holding Voltage Trigger Voltage, and this parameter can be a parameter to correspond to the process on, further more quickly identify problems and predict whether changes in parameter problem.
    Appears in Collections:[資訊工程學系] 博碩士論文

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