Discrete power MOSFETs are increasingly playing an important role in automotive electronics such as motor control where inductive loads are driven by the power devices. As a consequence, the ability of the MOSFET to withstand instances of unclamped inductive switching (UIS) is an important performance metric i.e. the ruggedness of the MOSFET. It had been proposed that the current failure mode is considered to be dominant at small external inductances while temperature failure usually occurred in device connected to large external inductive loads in UIS test. However, the failure mechanisms of device caused by the variation of external inductor cannot reflect the natural failure phenomena in power devices. In this work we present failure analysis of N-LDMOS under avalanche breakdown condition shows that the failure mechanism in a power MOSFET device depends on the number of device-fingers at a fixed inductive load. By TCAD simulation we observe that the device with lesser number of fingers (till 16) fail because of current failure mechanism as heat generated due to high current eventually destroys the parasitic transistor and hence contributes to failure. For higher fingers ranging from 16 to 100, time in avalanche, tAV gets prolonged in multi-finger device design. As a result, self-heating is more which causes temperature-failure in multi-finger device. The maximum amount of UIS energy i.e. Energy in avalanche, Single pulse (EAS) sustained by the device before failure is evaluated by Synopsys simulation tools. It is found that EAS has a linear relationship with number of device finger and device-width. We also present the optimized structure by modifying the poly-gate length which results higher energy in avalanche. Sensitive parameters in repetitive UIS tests such as duty cycle and finger design layout are also studied.
