Induced CMOS Latch-up in Bootstrapping Application

ASIA unversity > 資訊學院 > 資訊工程學系 > 博碩士論文 > Item 310904400/12744

jsp.display-item.identifier=請使用永久網址來引用或連結此文件: http://asiair.asia.edu.tw/ir/handle/310904400/12744

题名:	Induced CMOS Latch-up in Bootstrapping Application
作者:	Bai, Shu-Ming
贡献者:	Department of Computer Science and Information Engineering Sheu Gene
关键词:	CMOS;Bootstrapping;BJT;T-CAD;Latch-up;Shifting time waveform
日期:	2012
上传时间:	2012-11-18 09:00:55 (UTC+0)
出版者:	Asia University
摘要:	In this study, latch-up mechanisms of the complementary-metal-oxide-semiconductor (CMOS) in bootstrapping technique applied to DC/DC buck converter circuit has been clearly investigated by two dimensional (2D) TCAD simulations. The shifting times of input signal waveforms were demonstrated to be the key factor to induce the CMOS latch-up due to the triggering of parasitic bipolar junction transistors (BJTs) in the CMOS bootstrapping application. In addition, the free latch-up design window suggests that both of the larger rise time and longer shifting times of input signal waveforms will provide a larger safety operation region for circuit design engineers in this work.
显示于类别:	[資訊工程學系] 博碩士論文

文件中的档案:

档案	描述	大小	格式	浏览次数
index.html		0Kb	HTML	280	检视/开启

在ASIAIR中所有的数据项都受到原著作权保护.