UHV 700v-800v JFET Innovated Device Structure Combined with Control Gate.

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題名:	UHV 700v-800v JFET Innovated Device Structure Combined with Control Gate.
作者:	Imam, Syed Neyaz
貢獻者:	資訊工程學系
關鍵詞:	UHV JFET、Control Gate、Multiple RESURF、2D simulation、LDMOS
日期:	2018
上傳時間:	2018-06-22 01:55:39 (UTC+0)
出版者:	亞洲大學
摘要:	In this thesis a novel N-channel UHV 700v-800v JFET innovated device structure combined with control gate is studied. The UHV 600v LDMOS popular for high voltage power switching device and it may be ON/OFF device. For OFF device there are many LDMOS devices available but when it comes for ON device JFET is required where as LDMOS is OFF device. Since JFET is a normally on device so it is widely used as sensor and safety devices like fire alarm and automobile sensor etc. The various Pinch-off voltage can be adjusted through Nwell mask and gap between P-top and PPlus by keeping the breakdown voltage in between the range of 700v-800v. By using 2D simulation method instead of 3D simulation is more time convenient and time saving for optimization and design. Multi ring P-top structure is not only capable of adjusting various Pinch-off voltage it also enhances breakdown compared with uniform P-top structure. We can design the desired pinch-off voltage without any additional process mask. N-channel JFETs with different pinch-off voltages can be implemented in the low-cost BCD Integration.
顯示於類別:	[資訊工程學系] 博碩士論文

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