In this thesis, in order that we can execute our algorithm of still image compression on embedded system, we use the low-complexity and low-memory coding ways to reach a still image compression technique with high speed, high image quality and high compression ratio. So, we develop a way that is based on Discrete Cosine Transform (DCT) and refine it. Instead of DCT transformation, we use Fast Cosine Transform (FCT) that is faster and simpler than DCT. Furthermore, we add a perceptual coding for vision to increase the image compression quality and employing step size offset in quantization for improvement of compression ratio. Next, we establish context model by the relation between DC values of all DCT blocks, and use differential pulse code modulation to reduce quality of data. For more effective encoding, we scan coefficients by zerotree coding, and use Golomb-Rice Fundamental Sequence to improve compression ratio.
Next, our codec is implemented on DM6446 which is developed by TI. DM6446B board includes TMS320C64x+™ DSP kernel and ARM926 processer. The purpose of the ARM is the application of operation system, DSP execute the algorithm of video codec. In this thesis, we use some efficient algorithms and make good use of hardware to increase processing efficiency, we expect that he efficacy of DaVinci board can be enhanced by our algorithm. it can get more efficient capability on board.
