Reliabilities of semiconductor devices become more concerned issues in modern semiconductor integrated circuits. One of failure problems is electro-statics discharge (ESD) failures that caused by triboelectric charging, so to encounter this problem by using ESD protection devices in input-output of integrated circuits. This paper describes about improvement NSCR (N-type Silicon Controlled Rectifier) ESD protection device for 40V BCD (Bipolar CMOS and DMOS) technology comparing between original structure with proposed structures by using process simulation and device simulation. We got lower trigger voltage, higher holding voltage and lower temperature comparing with original structure. P-type Buried Layer (PBL), N-type Buried Layer (NBL) and P+ strap are implemented in order to achieve those results.
